View 7672RPFS-05_1203295.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

12-Bit A/D Converter
VREF AIN1 AIN2
7672
23
VDD VSS
2
+ -
1
24
12-BIT DAC
+ -
22
SUCCESSIVE APPROXIMATION REGISTER
21
CONTROL LOGIC
BUSY
12-BIT LATCH
20 19
CS
THREE-STATE OUTPUT DRIVERS CLOCK OSCILLATOR 3
AGND
RD
18 17
CLK OUT CLK IN
4
D11
11
D4
12
DGND
13
D3
16
D0
Logic Diagram
FEATURES:
* 12-bit high speed A/D converter * RAD-PAK(R) radiation-hardened against natural space radiation * Total dose hardness: - > 100 krad (Si), depending upon space mission * Excellent Single Event Effect - SEL > 120 Mev/mg/cm2 - SEUTH > 5.8 Mev/mg/cm2 - SEUSat = -1E-4 cm2/Device * Package: - 24 pin RAD-PAK(R) flat package - 24 pin RAD-PAK(R) DIP * Fast conversion times: - 7672-05: 5 s * Low 110 mW typical power consumption - Corrects all single-bit errors - Detects all double and some triple-bit errors * High-speed BiCMOS technology - Choice of +5V and +10V input ranges - Operates with +5V and -12V power supplies - Fast 125 ns bus-access time
(Si) total dose tolerance, depending upon space mission. The 7672 uses an accurate high-speed DAC and comparator to achieve conversion time as low as 5 s while dissipating only 110 mW of power. The 7672 is designed to be used with an external reference voltage. This allows the user to choose a reference whose performance suits the application or to drive multiple 7672s from a single system reference, since the reference input is buffered and draws very little current. For digital signal processing applications where absolute accuracy and temperature coefficients may be unimportant, a low cost reference can be used. For optimal precision, a high accuracy reference where an absolute 12-bit accuracy can be obtained over a wide temperature range may be used. Analog input range is pin-selectable for 0 to +5V, 0 to +10V, or 5V, making the ADC ideal for data acquisition and analog input/output cards. A high-speed digital interface (125 ns data access time) with three state data outputs is compatible with most microprocessors. Maxwell Technologies' patented RAD-PAK(R) packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.
Memory
DESCRIPTION:
Maxwell Technologies' 7672 high-speed 12-bit analog-todigital converter microcircuit features a greater than 100 krad Rev 13 08.09.02 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
All data sheets are subject to change without notice
1
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
TABLE 1. 7672 PINOUT DESCRIPTION
PIN 1 2 3 4-11 12 13-16 17 18 19 20 21 22 23 24 SYMBOL AIN1 VREF AGND D11-D4 DGND D3-D0 CLKIN CLKOUT RD CS BUSY VSS VDD AIN2 DESCRIPTION Analog Input Voltage-Reference Input Analog Ground Three-State Data Outputs Digital Ground Three-State Data Outputs Clock Input Clock Output READ Input CHIP SELECT BUSY Negative Supply, -12V Positive Supply, +5V Analog Input
7672
Memory
TABLE 2. 7672 ABSOLUTE MAXIMUM RATINGS
PARAMETER Positive Supply Voltage to DGND Negative Supply Voltage to DGND AGND to DGND AIN1, AIN2 to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND VREF to AGND Power Dissipation to +75C Power Dissipation above 75C (Derate) Thermal Impedance Storage Temperature Range Operating Temperature Range SYMBOL VDD VSS --VIN VOUT -PD -MIN -0.3 -17 -0.3 -15 -0.3 -0.3 VSS -0.3 ----65 -55 MAX 7.0 +0.3c VDD +0.3 +15 VDD +0.3 VDD +0.3 VDD +0.3 1000 10 3.24 +150 +125 UNITS V V V V V V V mW mW/C C/W C C
JC
TSTG TA
08.09.02 REV 13
All data sheets are subject to change without notice
2
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
TABLE 3. 7672 RECOMMENDED OPERATING CONDITIONS
PARAMETER Positive Supply Voltage Negative Supply Voltage VREF Input Range Power Dissipation VDD = 5V, VSS = -12V SUBGROUPS 1 1 1 1 SYMBOL VDD VSS VREF PD MIN 4.75 -13.2 -5.05 -MAX 5.25 -10.8 -4.95 179
7672
UNITS V V V mW
TABLE 4. 7672 DC ELECTRICAL CHARACTERISTICS
(VDD = 5V 5%, VSS = -12V 10%, VREF = -5V, TA = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input Leakage Current Output Leakage Current Input Capacitance 1 Floating State Output Capacitance2 Power Supply Current Power Supply Rejection, VDD Power Supply Rejection, VSS Analog Input Current (AIN1 or AIN2) VREF Input Range 1 VREF Input Current Resolution Integral Nonlinearity Differential Nonlinearity Unipolar Offset Error Unipolar Gain Error SYMBOL VIL VIH VOL VOH IIN ILKG CIN COUT IDD ISS PSRR (VDD) VDD = 4.75 to 5.25 volts VSS = -12V PSRR (VSS) VSS = -10.8 to -13.2 volts VDD = 5V IAIN VREF IREF RES INL DNL UOE UGE TA = -55 to +125C TA = +25 C TA = -55 to +125C 12 bits, no missing codes TA = -55 to +125C TA = +25C TA = -55 to +125C TA = +25 C TA = -55 to +125C
08.09.02 REV 13
TEST CONDITION
SUBGROUPS 1, 2, 3 1, 2, 3
MIN -2.4 -4.0 ------
MAX 0.8 -0.4 -10 20 10 10 15 7 -12 1 1 3.5 1.75 -4.95 3 -1 1 0.9 5 6 5 7
UNITS V V V V A A pF pF mA LSB LSB mA V A bits LSB LSB LSB LSB
ISINK = 1.6 mA ISOURCE = -200 A (CS,RD) VIN = VDD or GND (CLKIN) VIN = VDD or GND (D0-D11) VOUT = VDD or GND
1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3
Memory
1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1 2, 3 1, 2, 3 1 2, 3 1 2, 3
-------5.05 -12 --------
Unipolar Range: 0 to 5 V, 10V Bipolar Range: 5V
All data sheets are subject to change without notice
3
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
TABLE 4. 7672 DC ELECTRICAL CHARACTERISTICS
(VDD = 5V 5%, VSS = -12V 10%, VREF = -5V, TA = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Bipolar Zero Error Bipolar Gain Error 1. Guaranteed by design. SYMBOL BZE BGE TEST CONDITION TA = +25C TA = -55 to +125C TA = +25C TA = -55 to +125C SUBGROUPS 1 2, 3 1 2, 3 MIN ----MAX 5 6 5 7
7672
UNITS LSB LSB
TABLE 5. 7672 TIMING CHARACTERISTICS 1,2
(VDD = 5V 5%, VSS = -12V 10%, VREF = -5V, TA = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Conversion Time, Synchronous Clk, 3 Conversion Time, Asynchronous Clk, CS to RD Setup Time RD to BUSY Delay Data Access Time 4 RD Pulse Width CS to RD Hold Time Data Setup Time After BUSY4 Bus Relinguish Time5 Delay Between Read Operations TEST CONDITION 12.5 clks, TA = -55 to +125 C 12-13 clks, TA = -55 to +125 C TA = -55 to +125 C CL = 50 pF, TA = +25 C CL = 50 pF, TA = -55 to +125 C CL = 100 pF, TA = +25 C CL = 100 pF, TA = -55 to +125 C TA = -55 to +125 C TA = -55 to +125 C CL = 100 pF, TA = +25 C CL = 100 pF, TA = -55 to +125 C (TA = +25 C) (-55 < TA < +125 C) (-55 < TA < +125 C) SUBGROUPS 9, 10, 11 9, 10, 11 9, 10, 11 9 10, 11 9 10, 11 9, 10, 11 9, 10, 11 9 10, 11 9 10, 11 9, 10, 11 SYMBOL tCONV tCONV t1 t2 t3 t4 t5 t6 -t7 t8 MIN -4.8 0 ----t3 0 ----200 MAX 5.0 5.2 -190 270 125 170 --70 100 75 90 -UNITS us us ns ns ns ns ns ns ns ns
Memory
1. 1LSB = FS/4096; TA = 25 C; Performance over power supply tolerance is guaranteed by power supply rejection test. 2. All inputs are 0V to +5V swing with tr = tr = 5ns (10 to 90% of +5V) and timed from a voltage level of +1.6V. 3. Functionally tested. 4. t3 and t6 are measured with the load circuits of Figure 1 and are defined as the time required for an output to cross +0.8 or +2.4. 5. t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuit of Figure 2.
08.09.02 REV 13
All data sheets are subject to change without notice
4
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
FIGURE 1. LOAD CIRCUITS FOR ACCESS TIME
7672
FIGURE 2. LOAD CIRCUIT FOR BUS RELINQUISH TIME
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
5
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
FIGURE 3.
7672
FIGURE 4. ANALOG INPUT RANGE CONFIGURATIONS
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
6
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
FIGURE 5. UNIPOLAR OPERATING USING A REFERENCE
7672
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
7
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
7672
Memory
24 PIN RAD-PAK(R) DUAL IN LINE PACKAGE
SYMBOL MIN A b b2 c D E eA eA/2 e L Q S1 S2 N 0.135 0.015 0.005 0.005 -0.014 0.045 0.008 -0.510 DIMENSION NOM 0.167 0.018 0.050 0.010 1.200 0.594 0.600 BSC 0.300 BSC 0.100 BSC 0.145 0.030 0.025 -24 0.155 0.045 --MAX 0.200 0.026 0.065 0.018 1.280 0.620
D24-02 Note: All dimensions in inches
08.09.02 REV 13
All data sheets are subject to change without notice
8
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
7672
Memory
24 PIN RAD-PAK(R) FLAT PACKAGE
SYMBOL MIN A b c D E E1 E2 E3 e L Q S1 N 0.315 0.026 0.005 0.153 0.015 0.004 -0.350 -0.180 0.030 DIMENSION NOM 0.170 0.017 0.005 0.596 0.400 -0.236 0.082 0.050 BSC 0.325 0.050 0.015 24 0.335 0.056 -MAX 0.183 0.022 0.009 0.640 0.420 0.450 ---
F24-01 Note: All dimensions in inches
08.09.02 REV 13
All data sheets are subject to change without notice
9
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
Important Notice:
7672
These data sheets are created using the chip manufacturer's published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies' liability shall be limited to replacement of defective parts.
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
10
(c)2002 Maxwell Technologies All rights reserved.
12-Bit A/D Converter
Product Ordering Options
Model Number 7672 RP F X -XX Feature Access Time Option Details
05 = 5 us
7672
Screening Flow
Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55C, +25C, +125C) E = Engineering (testing @ +25C)
Memory
Package
D = Dual In-line Package (DIP) F = Flat Pack
Radiation Feature
RP = RAD-PAK(R) package
Base Product Nomenclature
12-Bit A/D Converter
08.09.02 REV 13
All data sheets are subject to change without notice
11
(c)2002 Maxwell Technologies All rights reserved.

▲Up To Search▲

Price & Availability of 7672RPFS-05

	To Download 7672RPFS-05 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .